The Transition Fault Model of Programmable Logic

Authors

  • V. Abraitis Kaunas University of Technology
  • Ž. Tamoševičius Kaunas University of Technology

Abstract

There is presented the fault model of programmable integrated circuits in this paper, when programmable integrated circuits are configured to implement a given application. Proposed fault model can be used with traditionally automatic test sequence generators and result will be exhaustive test of transition faults for programmable integrated circuits with given configuration. Model was tested using Virtex family PFGAs. Ill. 5, bibl. 17 (in English; summaries in English, Russian and Lithuanian).

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Published

2008-01-03

How to Cite

Abraitis, V., & Tamoševičius, Ž. (2008). The Transition Fault Model of Programmable Logic. Elektronika Ir Elektrotechnika, 81(1), 73-76. Retrieved from https://eejournal.ktu.lt/index.php/elt/article/view/11039

Issue

Vol. 81 No. 1 (2008)

Section

T 120 SYSTEM ENGINEERING, COMPUTER TECHNOLOGY

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