The Efficient Solution of Parasitic Voltage Annulment in Electronic Low Resistance Comparator

  • R. Radetic
  • M. Pavlov Mining and Metallurgy Institute Bor
  • D. R. Milivojevic Mining and Metallurgy Institute Bor

Abstract

The article describes an efficient solution of parasitic voltage annulment applied in low resistance comparison. By development and design the low resistance comparator with many measuring ranges, occurred some difficulties with parasitic voltages. Theirs influence on measuring result is not negligible. To eliminate those disturbances, the analog voltage integration method is used. That is the way to nullify the parasitic voltages. Also, this electric circuit eliminates the influence of AC disturbances, which are consequence of network power supply (50 Hz frequency), independently of intensity of voltage amplifying. Ill. 6, bibl. 10, tabl. 1 (in English; abstracts in English and Lithuanian).

DOI: http://dx.doi.org/10.5755/j01.eee.121.5.1653

Published
2012-05-04
Section
ELECTRONICS