Efficiency Increase of Switched Mode Power Supply through Optimization of Transistor's Commutation Mode
Abstract
The paper deals with research of actions, which are taking place during the switching of power transistor in different commutation modes. The main target is to reach optimal settings of selected commutation mode (hard switching, Zero Voltage switching, Zero Current switching) what in final result has to be reflected in efficiency increase of switched mode power supply (SMPS). Target application of SMPS is high frequency operation (from 100 kHz) with output power over 1,5kW. The paper shows simulation results of various settings of commutation mode for transistor IPW60R165CP. At the end of paper the comparison of SMPS efficiency with standard settings and optimal settings of commutation mode is being shown.
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