Optimizing FDTD Memory Bandwidth by Using Block Float-Point Arithmetic


  • Stefan Pijetlovic
  • Milos Subotic
  • Nebojsa Pjevalica




FDTD, FPGA, Block-floating point, Memory management.


Finite-difference time-domain is a numerical method used for modelling of computational electrodynamics. The method is resource intensive, especially regarding memory usage. Multiple memory accesses are required per single computation so memory bandwidth acts as a bottleneck limiting the overall performance. Existing solutions use either fixed-point or floating-point arithmetic, depending on the complexity of the target platform, to model the data. Floating-point requires less memory access but the computation is more intensive due to the normalisation. Fixed-point is the opposite – simple computation but with more memory access for the same precision. The novelty of this paper is in the block floating-point realization which is the middle ground between the two. The approach is less compute intensive than the floating-point solutions while using less memory than the fixed-point realization. This makes the solution an alternative for bit-exact platforms, such as field-programmable gate arrays. The results are compared to both floating-point and fixed-point implementations and the memory bandwidth and other resources needed for targeted platform are calculated.

DOI: http://dx.doi.org/10.5755/j01.eie.24.4.21475




How to Cite

Pijetlovic, S., Subotic, M., & Pjevalica, N. (2018). Optimizing FDTD Memory Bandwidth by Using Block Float-Point Arithmetic. Elektronika Ir Elektrotechnika, 24(4), 32-37. https://doi.org/10.5755/j01.eie.24.4.21475