Implementation of Sense Amplifier in 0.18-µm CMOS Process
DOI:
https://doi.org/10.5755/j01.eee.120.4.1466Abstract
Sense Amplifier is one of the major circuits in CMOS nonvolatile memories. The aim of this research is to implement Sense Amplifier in 0.18µm CMOS process to achieve both the lower reading power and superior reliability for sensing operation. In RFID transponder, EEPROM are used to store data. Memory access time, power dissipation and the reliability of an EEPROM is vigorously influenced by the features of the SA. Current type SA experience the larger current or power dissipation problems, which is not suitable for low voltage applications of RFID transponder. The proposed voltage-type SA is able to execute under a very low power supply voltage (VDD) between 1V to 2.6V VDD. The SA circuit implemented within the temperature range from -250C to 1250C. The compact layout design has been carried out to evaluate the efficiency of the circuit. The modified low voltage-type SA is appropriate for low-voltage applications like RFID EEPROM. Ill. 6, bibl. 10, tabl. 1 (in English; abstracts in English and Lithuanian).Downloads
Published
2012-04-03
How to Cite
Rahman, L. F., Reaz, M. B. I., Ali, M. A. M., & Marufuzzaman, M. (2012). Implementation of Sense Amplifier in 0.18-µm CMOS Process. Elektronika Ir Elektrotechnika, 120(4), 113-116. https://doi.org/10.5755/j01.eee.120.4.1466
Issue
Section
MICRO-, NANOELECTRONICS
License
The copyright for the paper in this journal is retained by the author(s) with the first publication right granted to the journal. The authors agree to the Creative Commons Attribution 4.0 (CC BY 4.0) agreement under which the paper in the Journal is licensed.
By virtue of their appearance in this open access journal, papers are free to use with proper attribution in educational and other non-commercial settings with an acknowledgement of the initial publication in the journal.
