CMOS Technology based Current Source with Harmonic Reducing Properties


  • A. Kasemaa Department of Electronics
  • P. Annus ELIKO Competence Centre


Multilevel higher harmonics reducing algorithm is proposed for digitally generated signal processing code involving only additions and shifting. An efficient CMOS technology based current source is designed to work with shortened square wave waveforms. The current source consists of biasing circuit, switchable current mirrors and H-bridge current output stage. The analysis of the proposed system is given and new practical solutions for applications in portable devices are described. The proposed solution improves the power consumption and reduces the complexity of the system as a whole. The main advantage of this method is greater efficiency because for measuring cycle only one or two pairs of switchable current mirrors will be activated to drive the H-bridge.




How to Cite

Kasemaa, A., & Annus, P. (2010). CMOS Technology based Current Source with Harmonic Reducing Properties. Elektronika Ir Elektrotechnika, 106(10), 143-146. Retrieved from