Acceleration Techniques for Analysis of Microstrip Structures

Authors

  • R. Pomarnacki Vilnius Gediminas Technical University
  • A. Krukonis Vilnius Gediminas Technical University
  • V. Urbanavicius Vilnius Gediminas Technical University

DOI:

https://doi.org/10.5755/j01.eee.20.5.7109

Keywords:

Microstrip structures, parallel algorithm, sparse bound-matrix, GPU, CUDA technology

Abstract

This paper discusses the acceleration techniques for analysis of microstrip structures. Accurate calculation of parameters of such structures with numerical techniques requires the solution of dense matrix equations involving thousands of unknowns. Solution of this large problem takes long time. In this paper we present three techniques for such computations acceleration: parallel algorithm implemented in computer cluster, sparse bound-matrix technique, and graphic processing unit in conjunction with CUDA technology. The execution time and speed-up of proposed techniques are evaluated through comparing of different numbers of processors and unknowns. The results indicate that all presented techniques can significantly reduce computation time.

DOI: http://dx.doi.org/10.5755/j01.eee.20.5.7109

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Published

2014-05-13

How to Cite

Pomarnacki, R., Krukonis, A., & Urbanavicius, V. (2014). Acceleration Techniques for Analysis of Microstrip Structures. Elektronika Ir Elektrotechnika, 20(5), 108-111. https://doi.org/10.5755/j01.eee.20.5.7109

Issue

Vol. 20 No. 5 (2014)

Section

HIGH FREQUENCY TECHNOLOGY, MICROWAVES

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