Implementation Analysis of Matrix Power Cipher in Embedded Systems
DOI:
https://doi.org/10.5755/j01.eee.118.2.1182Abstract
In this paper we present a theoretical implementation analysis of new matrix power cipher in embedded systems. This cipher is based on the matrix power function. This allows achieving required security and efficiency while minimizing the number of rounds. In this paper we briefly overview the matrix power and the whole cipher, discuss the security assumptions and specify the limits of security parameters. The speed of the cipher was estimated by counting operations considering the usage of look-up tables and realization in 8-bits AVR microcontrollers. Theoretical speed of the matrix power cipher was compared with the fastest known AES-128 implementations. Our cipher performs faster than AES-128 when encryption and decryption are considered together. Bibl. 11, tabl. 1 (in English; abstracts in English and Lithuanian).Downloads
Published
2012-02-07
How to Cite
Luksys, K., Sakalauskas, E., & Venckauskas, A. (2012). Implementation Analysis of Matrix Power Cipher in Embedded Systems. Elektronika Ir Elektrotechnika, 118(2), 95-98. https://doi.org/10.5755/j01.eee.118.2.1182
Issue
Section
SYSTEM ENGINEERING, COMPUTER TECHNOLOGY
License
The copyright for the paper in this journal is retained by the author(s) with the first publication right granted to the journal. The authors agree to the Creative Commons Attribution 4.0 (CC BY 4.0) agreement under which the paper in the Journal is licensed.
By virtue of their appearance in this open access journal, papers are free to use with proper attribution in educational and other non-commercial settings with an acknowledgement of the initial publication in the journal.