Development of a Wireless Low Power Datalogger with High Performance Converter

Authors

  • Francisco Javier Quiles University of Cordoba
  • Manuel Ortiz University of Cordoba
  • Andres Gersnoviez University of Cordoba
  • Maria Brox University of Cordoba
  • Alberto Olivares Telematica y Comunicaciones, University of Granada
  • Peter Glosekotter University of Applied Sciences Munster

DOI:

https://doi.org/10.5755/j01.eee.21.3.10044

Keywords:

CPLD, data acquisition, energy-saving systems, microcontroller, sensor networks.

Abstract

In this work, a low power datalogger with a wireless connection is described. The datalogger can be used as a portable and stand-alone device, as well as a wireless sensor network node. A flexible architecture, which combines a microcontroller with external local buses (data and address) and a complex programmable logic device (CPLD), has been used. The system has two special characteristics: one of them is the high resolution of A/D converters; the second is based on the incorporation of a non-volatile random-access memory (NVRAM) that allows fast access to stored data and a low consumption. Storing data in an NVRAM implies an extra security level for the maintenance of data even when the batteries of the system have been exhausted. The complete glue logic has been integrated into a Zero-Power CPLD in order to reduce size. In addition, in each specific application, the CPLD allows the implementation through hardware of some interfaces to sensor module, saving computation time.

DOI: http://dx.doi.org/10.5755/j01.eee.21.3.10044

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Published

2015-06-04

How to Cite

Quiles, F. J., Ortiz, M., Gersnoviez, A., Brox, M., Olivares, A., & Glosekotter, P. (2015). Development of a Wireless Low Power Datalogger with High Performance Converter. Elektronika Ir Elektrotechnika, 21(3), 21-27. https://doi.org/10.5755/j01.eee.21.3.10044

Issue

Vol. 21 No. 3 (2015)

Section

ELECTRONICS

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