JASONIS, V.; POVILIAUSKAS, D.; MARCINKEVIČIUS, A. Simulation of the Integrated Signal Folding Circuit with P–Spice. Elektronika ir Elektrotechnika, [S. l.], v. 73, n. 1, p. 37–40, 2007. DOI: 10.5755/j02.eie.10327. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/10327.. Acesso em: 30 may. 2026.