EIDUKAS, D. Modeling of Level of Defects in Electronics Systems. Elektronika ir Elektrotechnika, [S. l.], v. 99, n. 3, p. 13–16, 2010. DOI: 10.5755/j02.eie.9896. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/9896.. Acesso em: 3 may. 2026.