Jasonis V, Poviliauskas D, Marcinkevičius A. Simulation of the Integrated Signal Folding Circuit with P–Spice. ELEKTRON ELEKTROTECH [Internet]. 2007Jan.3 [cited 2024Apr.25];73(1):37-40. Available from: https://eejournal.ktu.lt/index.php/elt/article/view/10327