Guerra-Gomez I, Tlelo-Cuautle E. Sizing Analog Integrated Circuits by Current-Branches-Bias Assignments with Heuristics. ELEKTRON ELEKTROTECH [Internet]. 2013Dec.2 [cited 2024Dec.22];19(10):81-6. Available from: https://eejournal.ktu.lt/index.php/elt/article/view/2464