Bareiša, E., P. Bieliauskas, V. Jusas, A. Targamadzė, L. Motiejūnas, and R. Šeinauskas. “Factor of Randomness in Functional Delay Fault Test Generation for Full Scan Circuits”. Elektronika ir Elektrotechnika 105, no. 9 (October 29, 2010): 39-42. Accessed December 6, 2021. https://eejournal.ktu.lt/index.php/elt/article/view/9165.