Bareiša, E., V. Jusas, K. Motiejūnas, and R. Šeinauskas. “Testing of FPGA Logic Cells”. Elektronika ir Elektrotechnika 56, no. 7 (October 20, 2004). Accessed December 4, 2024. https://eejournal.ktu.lt/index.php/elt/article/view/10847.