[1]
E. Bareiša, P. Bieliauskas, V. Jusas, A. Targamadzė, L. Motiejūnas, and R. Šeinauskas, “Factor of Randomness in Functional Delay Fault Test Generation for Full Scan Circuits”, ELEKTRON ELEKTROTECH, vol. 105, no. 9, pp. 39–42, Oct. 2010, Accessed: Jan. 22, 2026. [Online]. Available: https://eejournal.ktu.lt/index.php/elt/article/view/9165