E. Bareiša, P. Bieliauskas, V. Jusas, A. Targamadzė, L. Motiejūnas, and R. Šeinauskas, “Factor of Randomness in Functional Delay Fault Test Generation for Full Scan Circuits”, ELEKTRON ELEKTROTECH, vol. 105, no. 9, pp. 39–42, Oct. 2010, doi: 10.5755/j02.eie.9165.