Bareiša, E., Bieliauskas, P., Jusas, V., Targamadzė, A., Motiejūnas, L. and Šeinauskas, R. (2010) “Factor of Randomness in Functional Delay Fault Test Generation for Full Scan Circuits”, Elektronika ir Elektrotechnika, 105(9), pp. 39-42. Available at: https://eejournal.ktu.lt/index.php/elt/article/view/9165 (Accessed: 4December2021).