Marcinkevičius, A. J., Jasonis, V. and Poviliauskas, D. (2007) “Signal Simulation in Folding and Interpolating Integrated ADC”, Elektronika ir Elektrotechnika, 77(5), pp. 29-32. Available at: https://eejournal.ktu.lt/index.php/elt/article/view/10733 (Accessed: 28March2024).