BAREIŠA, E.; BIELIAUSKAS, P.; JUSAS, V.; TARGAMADZĖ, A.; MOTIEJŪNAS, L.; ŠEINAUSKAS, R. Factor of Randomness in Functional Delay Fault Test Generation for Full Scan Circuits. Elektronika ir Elektrotechnika, [S. l.], v. 105, n. 9, p. 39-42, 2010. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/9165. Acesso em: 6 dec. 2021.