KAŠAUSKAS, V.; ANILIONIS, R.; EIDUKAS, D. Simulation of the MOS Transistors Structures Channel Technological Problems. Elektronika ir Elektrotechnika, [S. l.], v. 106, n. 10, p. 139-142, 2010. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/9144. Acesso em: 7 jul. 2022.