JASONIS, V.; POVILIAUSKAS, D.; MARCINKEVIČIUS, A. Simulation of the Integrated Signal Folding Circuit with P–Spice. Elektronika ir Elektrotechnika, [S. l.], v. 73, n. 1, p. 37-40, 2007. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/10327. Acesso em: 20 apr. 2024.