BENISEVICIUTE, R.; BUTKUS, L.; SEINAUSKAS, R. Analysis of Physical Level Faults of CMOS Integrated Circuits and Bonds with Higher Levels Faults. Elektronika ir Elektrotechnika, [S. l.], v. 18, n. 5, 1998. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/16035. Acesso em: 4 dec. 2024.