Hardware Implementation of Single Iterated Multiplicative Inverse Square Root. Elektronika ir Elektrotechnika, [S. l.], v. 23, n. 4, p. 18–23, 2017. DOI: 10.5755/j01.eie.23.4.18717. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/18717.. Acesso em: 5 dec. 2025.