Nonlinear Parasitic Capacitance Modelling of High Voltage Power MOSFETs in Partial SOI Process. Elektronika ir Elektrotechnika, [S. l.], v. 22, n. 3, p. 37–43, 2016. DOI: 10.5755/j01.eie.22.3.15312. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/15312.. Acesso em: 5 dec. 2025.