KERŠYS, T.; ANILIONIS, R.; EIDUKAS, D. Simulation of Stress Distribution in the Silicon Substrate. Elektronika ir Elektrotechnika, [S. l.], v. 76, n. 4, p. 3–8, 2007. DOI: 10.5755/j02.eie.10705. Disponível em: https://eejournal.ktu.lt/index.php/elt/article/view/10705.. Acesso em: 3 may. 2026.