[1]
Petrovic, N., Pjevalica, N., Pjevalica, V. and Teslic, N. 2017. Linearization Approach for Symmetric Hysteresis Loop Modelling and Core Loss Prediction. Elektronika ir Elektrotechnika. 23, 4 (Jul. 2017), 9-17. DOI:https://doi.org/10.5755/j01.eie.23.4.18716.