Control of Grid Connected Modular Multilevel Converter

1Abstract—This paper describes the control of multilevel voltage source active rectifier connected directly to ac grid. The proposed topology of multilevel converter is composed of three cascaded H-bridge converters (CHB), thus in this case seven level converter. Designed control algorithm provides direct current control in each phase even under unbalanced load. The main attention is paid to voltage balancing of the individual power cells (H-bridge). The voltage balancing algorithm is designed separately for each power cell. The paper presents simulation and experimental results of designed low-voltage laboratory prototype with rated power of 10 kW.


I. INTRODUCTION
The objective of this research has been analysis and design of control algorithm for three-phase multilevel voltage-source active rectifier (ac/dc converter), connected directly to ac grid without transformer.The multilevel converter topology is based on cascaded H-bridge converters.Presented grid connected modular converter consist of 3 CHB per phase resulting in 7 voltage level converter.The basic converter scheme is shown in Fig. 1.This type of converter topology is well known e.g.[1]- [9].The converter topology and designed control were tested on low-voltage single-phase laboratory prototype based on standard semiconductor parts.The final application of this multilevel converter is 6 MW/6 kV three-phase active rectifier connected to ac grid directly without transformer.
Proposed multilevel converter with developed control algorithm has these challenging requirements (i) the distribution of dc-link voltage on each H-bridge cell must be near to required value (Uc_mXw = 150 V) and (ii) harmonic ac currents should has very low THDi.These requirements are difficult to achieve especially for non-symmetrical condition like two phase operation for single-phase ac grid ground short-circuit.In addition we want to ensure a very low current ripple therefore PS-PWM (phase shifted pulse-width modulation) is used with zero vector alternating, which is well described in [10]- [11].

II. PROPOSED CONTROL
Our designed control of ac/dc converter based on cascaded H-bridge uses three separate control loops (these control loops are the same for each converter phase -a, b, c).The presented control algorithm can operates under nonsymmetric operation or with fully autonomous phase control.It allows proper converter function in single-phase short circuit grid-ground condition or under other singlephase grid faults.Each one of these independent control loops is composed of three parts as a shown in Fig. 2: (i) feed-forward (mathematical model) branch is located in the top of the figure, (ii) voltage and current control branch which is located in the middle part of the figure and (iii) voltage balancing branch is located in the bottom of the figure.Very important part of control algorithm is synchronization with ac grid.The designed control is composed of standard linear PI (proportional-integral) and PR (proportional-resonant) controllers.The narrow frequency response of the PR controllers provides high robustness on external disturbances and high quality sinusoidal response without permanent control error.Modulation for each phase is solved separately by PS-PWM (firing pulses phase_a, b, c in Fig. 2) and implemented in FPGA.The control algorithm of each phase (it means singlephase control) of converter is shown more detail in Fig. 3.These control loops for phase_a are composed of synchronization block, with output signals Um (v oltage magnitude),  (voltage angular velocity), a (position of voltage vector).These signals are important for mathematical model and also for direct current control loop.Mathematical model (feed-forward compensation) part allows faster transient response.The mathematical model use (1) for calculation signal uv_estim.The values R (parasitic resistance) and L (induction) are constants and represents input inductor parameters, signal Im is amplitude of required value of ac current (output signal from voltage controller RUc_a).The PI controller (RUc_a) is used for control sum of dc-link voltage (Uc_a) to required value Ucw, with output signal Im.The value Uc_a is sum of voltage on dc-links cell of phase_a, as seen from ( 2).The direct current control is provided by PR controller Ria and Resonant controller R3rd.This resonant controller (R3rd) is in this case use as third harmonic compensator (for dead-time effect minimization).This method is well described in [10] or it is also possible to use filtration method described in [12] and [13].The resulting value uv_m1_a enters into PWM modulator and firing pulses switch the first cell (H-bridge) of phase_a.The second and the third cells are switched according to signals uv_m2_a and uv_m3_a.The value of these modulation signals uv_m2_a, uv_m3_a are slightly modified to ensure balancing of dc links of each cell in the phase_a by PI controllers RUc_m2 and RUc_m3.These controllers only modify the value of modulation signals size uv_m2_a, uv_m3_a from the signal uv_m1_a.The signals modification depends on sign of requirement current magnitude (sign(Im)).
Controller settings were found empirically by using extensive simulations as compromise between stability and response behaviour.The controllers were tuned separately for the current control loop (Ri, R3rd), the voltage control loop (RUc) and finally for the voltage balancing controllers (RUc_m2, RUc_m3).The final controllers' adjustment were held at the low-voltage laboratory prototype and resulting settings were: Ri (Kp = 1.1, Kr = 50), R3rd (Kr = 20), RUc (Kp = 0.3, Ti = 0.05 s), RUc (Kp = 0.005, Ti = 0.1 s).

III. SIMULATIONS AND EXPERIMENTAL RESULTS
The converter behaviour with designed control was at the first time tested on the simulation model of active rectifier (Fig. 1).The simulation model consists of three-phase voltage source (ua, ub, uc), input inductance L, three Hbridge for each phase connected in series, their dc-link capacitors (C) and nine separate equivalent current sources (iz_a_M1 -iz_c_M3) representing the load of active converter.The switching frequency of IGBTs is fixed to 800 Hz.The PWM frequency was chosen in relation to the final application 6 MW/6 kV to achieve low switching losses on semiconductors.
The active rectifier was simulated for non-symmetrical load (iz_a_M1 = 7 A, iz_a_M2 = 7.3 A, iz_a_M3 = 7.6 A, iz_b_M1 = 5.6 A, iz_b_M2 = 5 A, iz_b_M3 = 5.3 A, iz_c_M1 = 5 A, iz_c_M2 = 6 A, iz_c_M3 =7 A) as a shown in Fig. 4 and Fig. 5. Figure 4 represents current waveforms ia, ib, ic.Currents have a sinusoidal shape and zero phase shift with ac grid voltage ua, ub, uc.In this case the non-symmetrical load leads to different ac current amplitudes and current ripples.Different current ripples are based on different load impedances, resulting in different power and final size of phase modulation signals.The output dc-link voltage at individual power cells for step change of load is shown in Fig. 5.
Experimental tests of ac/dc converter were tested for the single-phase variant of converter.The converter load was represented by controlled inverter.The power circuit is shown in Fig. 6 and the converter power was limited to 1.1 kW.The complete experimental test values and parameters are given in Table I.
The control of multilevel converter has been implemented in the floating-point digital signal microcontroller Texas Instruments TMS320F28335 and PS-PWM modulator was realized on FPGA Altera EP3C40.Both devices are located on development board specially designed to control multilevel converters (described in 0).Utilization of FPGA allows to have perfectly synchronous PWM outputs, which are needed for proper function of PS-PWM.The FPGA design consists of basic system part as described in 0 and modulators part itself.Each full H-bridge has its own modulator (Fig. 7).The input signals (uv_mX_a, Period, Deadtime and Sawtooth phase shift) are type of int_16t and accessible by memory space of microcontroller.The control signals (dashed lines) are reachable through single configuration register.It is very easy to expand design to support more H-bridges, thus creates more levels of output voltage.Figure 9 shows converter behaviour in rectifier mode under steady-state condition with load 1.1 kW.The green signal represents ac grid voltage with zero phase shift with ac current (violet signal).The dark blue signal represents voltage on ac converter terminals uv_a seven voltage levels for this case (it is due the correct functions of PS-PWM for three H-bridge cells).The frequency of current ripple is 4800 Hz.That is result of PS-PWM and zero vectors alternating modulation technique.Figure 10 shows converter response on step change of load (with 10 % asymmetry for second cell).The light blue signal representing the voltage on dc-link of second cell rises faster because the load of this cell is lower than in other cells.Due to gradual control, PI controllers stabilize of all voltages at dc-links to required value 150 V (shown in Fig. 11).

IV. CONCLUSIONS
This paper presents prospective topology of ac/dc multilevel converter connected directly to ac grid.The main attention is paid in the control and active power cell dc-link voltage balancing strategy of input active rectifier.Designed control of cascaded H-bridge voltage-source active rectifier provides sinusoidal current waveform shape (even for nonsymmetrical converter load).The algorithm provides voltage balancing on individual power cells directly at the control structure level.This simple and powerful approach can be easily achieved by using conventional PR and PI controllers.These types of controllers are industry-standard components and can be easily implemented in common processors.The paper consists of simulation results supported by experimental test on the laboratory prototypes.

Fig. 1 .
Fig. 1.Configuration of designed three-phase multilevel ac/dc converter based cascaded H-bridge cells.

Fig. 2 .
Fig. 2. Proposed control for three-phase multilevel ac/dc converter based cascaded H-bridge cells.

Fig. 3 .
Fig. 3. Detail of single-phase part of control of multilevel converter, including voltage balancing controllers.

Figure 8 -
Figure 8-Fig.11 present single-phase seven-level CHB active rectifier experimental results.Figure 8 illustrates the converter start-up under non-load conditions.Very fast rise of the current (violet signal) is caused by requirement to maximal current.At the first moment operates mainly model part of control.The voltage at dc-links (dark blue, light blue, green signals) rise from value 108 V (charged via diode