TY - JOUR AU - Seinauskas, R. AU - Bareisa, E. AU - Beniseviciute, R. AU - Jusas, V. PY - 1999/10/29 Y2 - 2024/03/29 TI - Design Strategy of New Generation of Electronics Circuits JF - Elektronika ir Elektrotechnika JA - ELEKTRON ELEKTROTECH VL - 23 IS - 5 SE - DO - UR - https://eejournal.ktu.lt/index.php/elt/article/view/16715 SP - AB - <span>The problems of electronics industry in Lithuania and perspective of they renascence are analyzed. Modern systems of electronics circuits design Cadence and Synopsys are presented. VHDL language is presented as a the basic tool of integrated circuits synthesis and design. The methodic of computer-aided and interactive layout design of VLSI are analyzed.</span> ER -