A High Efficiency 1.8W Power Amplifier for Wireless Communications

U. Eswaran, H. Ramiah, J. Kanesan


A power amplifier, implemented in 2µm InGaP/GaAs Heterojunction Bipolar Transistor (HBT) is presented. The size of the fabricated chip is 700 µm × 700 µm. With an integrated input matching network, the PA observes an input return loss (S11) of -22 dB. Biased at low quiescent current of 65 mA, it delivers a maximum output power of 1.8 W with 71 % efficiency at 1.85 GHz. The output return loss (S22) of the PA is -15.2 dB. The output matching network is designed to reduce the mismatch loss between the power amplifier and the antenna without compromising the output power and efficiency. The PA also exhibits a K-factor greater than 1 from DC up to 5 GHz, ensuring unconditional stability. The power gain of the PA is 14.9 dB. The measured results verify that the PA is capable to operate at high efficiency and to deliver high output power with a good output return loss.

DOI: http://dx.doi.org/10.5755/j01.eee.20.8.2949


Heterojunction bipolar transistor (HBT); power amplifier; power added efficiency (PAE); return loss

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Print ISSN: 1392-1215
Online ISSN: 2029-5731