Aspects of Fault Diagnostics for Sequential CMOS Circuits

R. Beniseviciute, J. Kilikauskas


New tendencies of manufacturing of integrated circuits have caused new methodics of their design. Among possible directions are the technologies with standartized minimum of line width. These technologies are widely employed for design of CMOS integrated circuits. The library of basic elements is formed for specific technology.
Elements of sequential circuits for MIETEC technology library are investigated. Various realizations of flip-flops physical faults in transistor and switch levels covering possibilities by tests of logic circuits are compared. Precision of physical faults localizing methods is investigated.


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