Testability Analysis Approach TADATPG for Deterministic Test Generation

Authors

  • E. N. Kulak Kharkov National University of Radio Electronics
  • M. A. Kaminska Kharkov National University of Radio Electronics
  • O. A. Guz Kharkov National University of Radio Electronics
  • O. N. Parfentiy Kharkov National University of Radio Electronics

Abstract

Method of testability analysis of digital circuits for deterministic test is offered. This approach is more suitable in comparison with existent classical methods. It is oriented to combinational and sequential circuits and based on topological analysis in gate level. The strategy of circuit’s modification for improvement of fault coverage is proposed. Ill. 10, bibl. 16 (in English; summaries in English, Russian and Lithuanian).

Downloads

Published

2006-02-01

How to Cite

Kulak, E. N., Kaminska, M. A., Guz, O. A., & Parfentiy, O. N. (2006). Testability Analysis Approach TADATPG for Deterministic Test Generation. Elektronika Ir Elektrotechnika, 66(2), 11-16. Retrieved from https://eejournal.ktu.lt/index.php/elt/article/view/10579

Issue

Vol. 66 No. 2 (2006)

Section

T 121 SIGNAL TECHNOLOGY

License

The copyright for the paper in this journal is retained by the author(s) with the first publication right granted to the journal. The authors agree to the Creative Commons Attribution 4.0 (CC BY 4.0) agreement under which the paper in the Journal is licensed.

By virtue of their appearance in this open access journal, papers are free to use with proper attribution in educational and other non-commercial settings with an acknowledgement of the initial publication in the journal.