Interpolator in a Sigma-Delta Digital-to-Analog Converter

  • V. Puidokas Vilnius Gediminas Technical University
  • A. J. Marcinkevičius Vilnius Gediminas Technical University

Abstract

The place of interpolator in Sigma-Delta DACs was briefly discussed. The summarized structure of the most common interpolators was provided. The more applicable interpolators’ structures were suggested and analyzed in comparison with [2]. Having changed the structure of incomplete interpolator and having optimized the stages, it was possible to improve the characteristic of amplitude frequency response even by 17 dB with less non-zero coefficients and much less FPGA resources. Experimental research of the full converter system (interpolator + modulator + output filter) it was defined that the designed interpolator (including 17 dB gaining) suits only a very limited cycle of modulators. Another version of interpolator was offered for the system, ensuring the suppression of the additional frequency band in the whole system above 99 dB instead of the previous 66 dB (or 49 dB in the supporting version of interpolator). Ill. 9, bibl. 5 (in English; summaries in English, Russian and Lithuanian).

Author Biographies

V. Puidokas, Vilnius Gediminas Technical University
A. J. Marcinkevičius, Vilnius Gediminas Technical University
Published
2009-02-01
How to Cite
Puidokas, V., & Marcinkevičius, A. J. (2009). Interpolator in a Sigma-Delta Digital-to-Analog Converter. Elektronika Ir Elektrotechnika, 90(2), 99-102. Retrieved from http://eejournal.ktu.lt/index.php/elt/article/view/10530
Section
T 171 MICROELECTRONICS