Hardware Emulation of Large Scale Boolean Equations Systems

  • S. M. Hyduke Aldec Inc.
  • V. I. Hahanov Kharkov national University of Radio Electronics
  • O. V. Melnikova Kharkov national University of Radio Electronics
  • I. V. Hahanova Kharkov national University of Radio Electronics

Abstract

This paper offers high-performance technology for processing Boolean equations, based on Compiler Synchronized Parallelprocessor Network-based Logic Device PRUS (Programmable Unlimited Systems) - single-bit spherical multiprocessor, which implemented into ASIC. This technology allows to perform parallel, sequential and pipelined Boolean equations processing using AND, OR, NOT, XOR operations. Multiprocessor is very efficient in hardware implementation – e.g. 256MB RAM is enough for processing Boolean equations containing 20 millions gates. Ill. 4, bibl. 7 (in English, summaries in Lithuanian, English, Russian).

Published
2015-03-16
Section
T 125 AUTOMATION, ROBOTICS